Why is AXI so popular in the FPGA space compared to other AMBA buses?
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Why is AXI so popular in the FPGA space compared to other AMBA buses?
Like, if you were designing a Cortex-M0+ MCU and told your team you were going to use an AXI UART they'd laugh at you and spec an APB UART instead.
So why do FPGA folks (especially Xilinx IPs) use AXI for the most stupidly slow stuff rather than only high performance interfaces and bridge to AHB/APB for slower stuff?
(And why is Xilinx allergic to SV interfaces and whatever the VHDL equivalent is? I feel like most of their biggest horrors like the IP integrator could be avoided if you could just make an AXI interconnect fabric core as a parameterized module with half a dozen ports on it)
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William D. Jonesreplied to Andrew Zonenberg last edited by
@azonenberg Do AHB/APB have the same "freedoms" to use as AXI?
(And this is full blown AXI right? I'm sure we can both think of reasons where an AXI stream UART is useful)
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Erin 💽✨replied to William D. Jones last edited by@cr1901 @azonenberg They're all under the same licence
I wonder how much of it comes down to their hard cores have AXI ports